Debug Data Collection for Functional Validation of Control-Flow in NoCs

During emulation and post-silicon validation of NoC-based systems, lack of observability of the NoC’s internal operations makes detection and debugging of functional bugs in the interconnect a difficult task. To verify the correctness of the control-flow portion of the NoC design, it’s common to run tests that exercise the network functionality, while abstracting away the data content of traffic. In this context, we propose a methodology where network data packets are repurposed for the storage of debug information collected during execution. Upon error detection, the collected data can provide the visibility needed to help debug the error. In particular, the debug data analysis provides a reconstruction of network traffic, as well as several statistics, such as packet interactions, sequence of events within router, and packet latencies per router. In our experiments, we found that this approach allows us to reconstruct over 80% of the routes of observed packets.